TheSyDeKick
Contents:
Introduction to TheSyDeKick
Thesdk core classes
RTL interface classes
Spice simulator interface classess
Inverter class
Inverter testbench class
Inverter tests class
ADS interface
ADS template class
Bootcamp
Examples
Documentation instructions
Indices and tables
TheSyDeKick
Index
Index
_
|
A
|
B
|
C
|
D
|
E
|
F
|
G
|
H
|
I
|
L
|
M
|
N
|
O
|
P
|
Q
|
R
|
S
|
T
|
U
|
V
|
W
_
__init__() (inverter.inverter method)
,
[1]
(inverter_testbench.inverter_testbench method)
_classfile (thesdk.IO property)
(thesdk.thesdk property)
_read_state() (thesdk.thesdk method)
_write_state() (thesdk.thesdk method)
A
add_connectors() (rtl.rtl method)
add_tb_timescale (rtl.rtl property)
adopt() (thesdk.iofile.iofile method)
ads
module
ads (class in ads)
ads.citi_to_touchstone
module
ads_submission (ads.ads property)
ads_template
module
ads_template (class in ads_template)
adscmd (ads.ads property)
adssimpath (ads.ads property)
adssrc (ads.ads property)
adssrcpath (ads.ads property)
after (spice.spice_iofile.spice_iofile attribute)
append_to_data() (spice.spice_iofile.spice_iofile method)
assignment (rtl.sv.verilog_connector.verilog_connector property)
assignment_matchlist (rtl.rtl property)
(rtl.testbench.testbench property)
(rtl.testbench_common.testbench_common property)
assignments() (rtl.sv.verilog_testbench.verilog_testbench method)
(rtl.testbench.testbench method)
B
bassign() (rtl.sv.verilog_connector.verilog_connector method)
big_endian (spice.spice_iofile.spice_iofile attribute)
C
citi_to_touchstone (class in ads.citi_to_touchstone)
clock_definition (rtl.sv.verilog_testbench.verilog_testbench property)
(rtl.testbench.testbench property)
cmdfile_ext (spice.eldo.eldo.eldo property)
(spice.ngspice.ngspice.ngspice property)
(spice.spectre.spectre.spectre property)
cmin (spice.spice_simcmd.spice_simcmd attribute)
commentchar (spice.eldo.eldo.eldo property)
(spice.ngspice.ngspice.ngspice property)
(spice.spectre.spectre.spectre property)
commentline (spice.eldo.eldo.eldo property)
(spice.ngspice.ngspice.ngspice property)
(spice.spectre.spectre.spectre property)
comments (ads.citi_to_touchstone.citi_to_touchstone property)
CONFIGFILE (thesdk.thesdk attribute)
configure_ads() (ads_template.ads_template method)
connect_inputs() (rtl.rtl method)
(rtl.sv.verilog_testbench.verilog_testbench method)
(rtl.testbench.testbench method)
connect_outputs() (rtl.rtl method)
connect_spice_inputs() (spice.spice method)
connect_spice_outputs() (spice.spice method)
connector_datamap() (rtl.rtl_iofile.rtl_iofile method)
connector_definitions (rtl.sv.verilog_testbench.verilog_testbench property)
(rtl.testbench.testbench property)
connectors (rtl.testbench.testbench property)
(rtl.testbench_common.testbench_common property)
content_parameters (rtl.sv.verilog_testbench.verilog_testbench property)
(rtl.testbench.testbench property)
contents (rtl.module.module property)
(rtl.module_common.module_common property)
(rtl.sv.verilog_module.verilog_module property)
(rtl.vhdl.vhdl_entity.vhdl_entity property)
copy_dspf() (spice.testbench.testbench method)
copy_or_relink() (rtl.rtl method)
copy_propval() (thesdk.thesdk method)
copy_rtl_sources() (rtl.rtl method)
create_connectors() (rtl.rtl method)
csvskip (spice.eldo.eldo.eldo property)
(spice.ngspice.ngspice.ngspice property)
(spice.spectre.spectre.spectre property)
custom_connectors (rtl.rtl property)
custom_subckt_name (spice.spice_module.spice_module property)
D
data (ads.citi_to_touchstone.citi_to_touchstone property)
Data (rtl.rtl_iofile.rtl_iofile property)
(thesdk.IO property)
data_names (ads.citi_to_touchstone.citi_to_touchstone property)
datatype (spice.spice_iofile.spice_iofile attribute)
(thesdk.iofile.iofile property)
dcsource_bundle (spice.spice property)
dcsource_declaration (spice.eldo.eldo.eldo property)
(spice.ngspice.ngspice.ngspice property)
(spice.spectre.spectre.spectre property)
dcsources (spice.testbench_common.testbench_common property)
dcsourcestr (spice.eldo.eldo_testbench.eldo_testbench property)
(spice.ngspice.ngspice_testbench.ngspice_testbench property)
(spice.spectre.spectre_testbench.spectre_testbench property)
(spice.testbench.testbench property)
DEBUG (spice.spice_iofile.spice_iofile property)
(spice.testbench.testbench property)
(thesdk.thesdk property)
define_io_conditions() (inverter.inverter method)
,
[1]
define_testbench() (rtl.sv.verilog_testbench.verilog_testbench method)
(rtl.testbench.testbench method)
definition (rtl.module.module property)
(rtl.module_common.module_common property)
(rtl.sv.verilog_connector.verilog_connector property)
(rtl.sv.verilog_module.verilog_module property)
(rtl.testbench.testbench property)
(rtl.vhdl.vhdl_entity.vhdl_entity property)
delete_iofile_bundle() (thesdk.thesdk method)
delete_rtlsimpath() (rtl.rtl method)
delete_rtlworkpath() (rtl.rtl method)
delete_spicesimpath() (spice.spice method)
devname (spice.spice_simcmd.spice_simcmd attribute)
DictData (rtl.rtl_iofile.rtl_iofile property)
dir (spice.spice_iofile.spice_iofile attribute)
(thesdk.iofile.iofile property)
directives (rtl.module.module property)
distributed_run (ads.ads property)
(spice.spice property)
dspf (spice.spice property)
dspfinclude (spice.eldo.eldo.eldo property)
(spice.ngspice.ngspice.ngspice property)
(spice.spectre.spectre.spectre property)
dspfincludecmd (spice.testbench.testbench property)
dumpfile (rtl.testbench_common.testbench_common property)
dut (spice.testbench.testbench property)
dut_instance (rtl.testbench_common.testbench_common property)
E
edge_mesh_enable (ads.ads property)
edgetype (spice.spice_iofile.spice_iofile attribute)
eldo (class in spice.eldo.eldo)
eldo_testbench (class in spice.eldo.eldo_testbench)
emsetupsrcpath (ads.ads property)
end_condition (rtl.sv.verilog_testbench.verilog_testbench property)
(rtl.testbench.testbench property)
entitypath (thesdk.thesdk property)
errpreset (spice.spectre.spectre.spectre property)
(spice.spice property)
esc_bus() (spice.testbench_common.testbench_common method)
eventoutdelim (spice.eldo.eldo.eldo property)
(spice.ngspice.ngspice.ngspice property)
(spice.spectre.spectre.spectre property)
excludelist (spice.spice_simcmd.spice_simcmd attribute)
execute_ads_sim() (ads.ads method)
execute_rtl_sim() (rtl.rtl method)
execute_spice_sim() (spice.spice method)
export() (rtl.module.module method)
(rtl.module_common.module_common method)
(rtl.sv.verilog_module.verilog_module method)
(rtl.vhdl.vhdl_entity.vhdl_entity method)
(spice.testbench.testbench method)
export_subckts() (spice.spice_module.spice_module method)
ext_file (spice.spice_dcsource.spice_dcsource property)
ext_start (spice.spice_dcsource.spice_dcsource attribute)
ext_stop (spice.spice_dcsource.spice_dcsource attribute)
extract (spice.spice_dcsource.spice_dcsource attribute)
extract_powers() (spice.spice method)
extracts (spice.spice property)
(spice.spice_common.spice_common property)
(thesdk.thesdk property)
F
file (spice.spice_iofile.spice_iofile property)
(spice.spice_module.spice_module property)
(thesdk.iofile.iofile property)
fmax (spice.spice_simcmd.spice_simcmd attribute)
fmin (spice.spice_simcmd.spice_simcmd attribute)
format_ios() (rtl.rtl method)
fpoints (spice.spice_simcmd.spice_simcmd attribute)
fscale (spice.spice_simcmd.spice_simcmd attribute)
fstep (ads.ads property)
fstep_unit (ads.ads property)
fstepsize (spice.spice_simcmd.spice_simcmd attribute)
fstop (ads.ads property)
fstop_unit (ads.ads property)
G
generate_contents() (ads.citi_to_touchstone.citi_to_touchstone method)
(rtl.sv.verilog_testbench.verilog_testbench method)
(rtl.testbench.testbench method)
(spice.testbench.testbench method)
generate_input_files() (ads.ads method)
global_parameters (thesdk.thesdk attribute)
GLOBALS (thesdk.thesdk attribute)
H
has_lsf (ads.ads property)
(thesdk.thesdk property)
header (rtl.module.module property)
(rtl.sv.verilog_module.verilog_module property)
(rtl.vhdl.vhdl_entity.vhdl_entity property)
(spice.testbench_common.testbench_common property)
HOME (thesdk.thesdk attribute)
I
icarus (class in rtl.icarus.icarus)
icarus_controlfilepaths (rtl.icarus.icarus.icarus property)
icarus_dofilepaths (rtl.icarus.icarus.icarus property)
icarus_rtlcmd (rtl.icarus.icarus.icarus property)
icarus_simdut (rtl.icarus.icarus.icarus property)
icarus_simtb (rtl.icarus.icarus.icarus property)
include (spice.eldo.eldo.eldo property)
(spice.ngspice.ngspice.ngspice property)
(spice.spectre.spectre.spectre property)
includecmd (spice.testbench.testbench property)
init() (ads_template.ads_template method)
(inverter.inverter method)
,
[1]
(inverter_testbench.inverter_testbench method)
initialization (rtl.sv.verilog_connector.verilog_connector property)
initlog() (thesdk.thesdk class method)
input_file (ads.citi_to_touchstone.citi_to_touchstone property)
inputsignals (spice.eldo.eldo_testbench.eldo_testbench property)
(spice.ngspice.ngspice_testbench.ngspice_testbench property)
(spice.spectre.spectre_testbench.spectre_testbench property)
(spice.testbench.testbench property)
instance (rtl.module.module property)
(spice.spice_module.spice_module property)
instname (rtl.module_common.module_common property)
interactive_ads (ads.ads property)
interactive_control_contents (rtl.rtl property)
interactive_controlfile (rtl.rtl property)
interactive_rtl (rtl.rtl property)
interactive_spice (spice.spice property)
interp_crossings() (spice.spice_iofile.spice_iofile method)
inverter
module
,
[1]
inverter (class in inverter)
,
[1]
inverter_testbench
module
inverter_testbench (class in inverter_testbench)
IO (class in thesdk)
io_signals (rtl.module.module property)
(rtl.module_common.module_common property)
(rtl.sv.verilog_module.verilog_module property)
(rtl.vhdl.vhdl_entity.vhdl_entity property)
iofile (class in thesdk.iofile)
iofile_bundle (thesdk.thesdk property)
iofile_close (rtl.sv.verilog_testbench.verilog_testbench property)
(rtl.testbench.testbench property)
iofile_definitions (rtl.sv.verilog_testbench.verilog_testbench property)
(rtl.testbench.testbench property)
iofile_eventdict (spice.spice property)
iofiles (rtl.testbench.testbench property)
(spice.testbench_common.testbench_common property)
ioformat (rtl.rtl_iofile.rtl_iofile property)
(rtl.sv.verilog_connector.verilog_connector property)
(spice.spice_iofile.spice_iofile attribute)
ionames (spice.spice_iofile.spice_iofile property)
(thesdk.iofile.iofile property)
IOS (inverter.inverter attribute)
,
[1]
,
[2]
,
[3]
ios (rtl.module.module property)
(rtl.module_common.module_common property)
(rtl.sv.verilog_module.verilog_module property)
(rtl.vhdl.vhdl_entity.vhdl_entity property)
IOS (thesdk.thesdk property)
iotype (spice.spice_iofile.spice_iofile attribute)
(thesdk.iofile.iofile property)
is_strobed (spice.spice_common.spice_common property)
L
lang (rtl.module_common.module_common property)
(rtl.rtl property)
(rtl.testbench_common.testbench_common property)
langmodule (rtl.module.module property)
(rtl.rtl_iofile.rtl_iofile property)
(rtl.testbench.testbench property)
lastline (spice.eldo.eldo.eldo property)
(spice.ngspice.ngspice.ngspice property)
(spice.spectre.spectre.spectre property)
libcmd (spice.eldo.eldo_testbench.eldo_testbench property)
(spice.ngspice.ngspice_testbench.ngspice_testbench property)
(spice.spectre.spectre_testbench.spectre_testbench property)
(spice.testbench.testbench property)
lines (ads.citi_to_touchstone.citi_to_touchstone property)
load_output_file (spice.spice property)
load_state (spice.spice property)
(thesdk.thesdk property)
load_state_full (thesdk.thesdk property)
logfile (thesdk.thesdk attribute)
lsf_submission (rtl.rtl property)
M
main() (ads_template.ads_template method)
(inverter.inverter method)
,
[1]
(inverter_testbench.inverter_testbench method)
maxstep (spice.spice_simcmd.spice_simcmd attribute)
mc (spice.spice_simcmd.spice_simcmd attribute)
mc_seed (spice.spice_simcmd.spice_simcmd attribute)
mesh_cells (ads.ads property)
method (spice.spice_simcmd.spice_simcmd attribute)
misccmd (rtl.sv.verilog_testbench.verilog_testbench property)
(rtl.testbench.testbench property)
(spice.testbench.testbench property)
model (inverter.inverter attribute)
,
[1]
,
[2]
,
[3]
(thesdk.thesdk property)
model_info (spice.spice_simcmd.spice_simcmd attribute)
module
ads
ads.citi_to_touchstone
ads_template
inverter
,
[1]
inverter_testbench
rtl
rtl.icarus.icarus
rtl.module
rtl.module_common
rtl.questasim.questasim
rtl.rtl_iofile
rtl.sv.sv
rtl.sv.verilog_connector
rtl.sv.verilog_module
rtl.sv.verilog_testbench
rtl.testbench
rtl.testbench_common
rtl.vhdl.vhdl
rtl.vhdl.vhdl_entity
spice
spice.eldo.eldo
spice.eldo.eldo_testbench
spice.ngspice.ngspice
spice.ngspice.ngspice_testbench
spice.spectre.spectre
spice.spectre.spectre_testbench
spice.spice_common
spice.spice_dcsource
spice.spice_iofile
spice.spice_module
spice.spice_simcmd
spice.testbench
spice.testbench_common
thesdk
thesdk.iofile
module (class in rtl.module)
module_common (class in rtl.module_common)
MODULEPATHS (thesdk.thesdk attribute)
N
name (ads.ads property)
(rtl.module_common.module_common property)
(rtl.rtl property)
(spice.spice property)
(spice.spice_dcsource.spice_dcsource attribute)
(spice.spice_iofile.spice_iofile attribute)
(spice.spice_module.spice_module property)
nbassign() (rtl.sv.verilog_connector.verilog_connector method)
nbr_of_ports (ads.citi_to_touchstone.citi_to_touchstone property)
neg (spice.spice_dcsource.spice_dcsource attribute)
netlist_params (thesdk.thesdk property)
ngspice (class in spice.ngspice.ngspice)
ngspice_testbench (class in spice.ngspice.ngspice_testbench)
noise (spice.spice_dcsource.spice_dcsource attribute)
(spice.spice_simcmd.spice_simcmd attribute)
normalization (ads.citi_to_touchstone.citi_to_touchstone property)
nproc (spice.spice property)
nprocflag (spice.eldo.eldo.eldo property)
(spice.ngspice.ngspice.ngspice property)
(spice.spectre.spectre.spectre property)
num_cols (spice.spectre.spectre_testbench.spectre_testbench property)
num_processes (ads.ads property)
(spice.spice property)
O
option (spice.eldo.eldo.eldo property)
(spice.ngspice.ngspice.ngspice property)
(spice.spectre.spectre.spectre property)
options (spice.eldo.eldo_testbench.eldo_testbench property)
(spice.ngspice.ngspice_testbench.ngspice_testbench property)
(spice.spectre.spectre_testbench.spectre_testbench property)
(spice.testbench_common.testbench_common property)
output_file (ads.citi_to_touchstone.citi_to_touchstone property)
output_file_extension (ads.citi_to_touchstone.citi_to_touchstone property)
P
par (thesdk.thesdk property)
parallel() (inverter_testbench.inverter_testbench method)
parameter (spice.eldo.eldo.eldo property)
(spice.ngspice.ngspice.ngspice property)
(spice.spectre.spectre.spectre property)
parameter_definitions (rtl.sv.verilog_testbench.verilog_testbench property)
(rtl.testbench.testbench property)
parameters (rtl.module.module property)
(rtl.module_common.module_common property)
(rtl.sv.verilog_module.verilog_module property)
(rtl.vhdl.vhdl_entity.vhdl_entity property)
(spice.testbench.testbench property)
paramname (spice.spice_dcsource.spice_dcsource attribute)
parent (spice.spice_dcsource.spice_dcsource attribute)
(spice.spice_iofile.spice_iofile attribute)
(spice.spice_simcmd.spice_simcmd attribute)
parse_citi() (ads.citi_to_touchstone.citi_to_touchstone method)
parse_io_from_file() (spice.spice_iofile.spice_iofile method)
pickle_excludes (thesdk.thesdk property)
plflag (spice.eldo.eldo.eldo property)
(spice.ngspice.ngspice.ngspice property)
(spice.spectre.spectre.spectre property)
(spice.spice property)
plflag_simcmd_prefix (spice.spectre.spectre.spectre property)
plotcmd (spice.eldo.eldo_testbench.eldo_testbench property)
(spice.ngspice.ngspice_testbench.ngspice_testbench property)
(spice.spectre.spectre_testbench.spectre_testbench property)
(spice.testbench.testbench property)
plotlist (spice.spice property)
(spice.spice_simcmd.spice_simcmd attribute)
plotprogcmd (spice.eldo.eldo.eldo property)
(spice.ngspice.ngspice.ngspice property)
(spice.spectre.spectre.spectre property)
(spice.spice property)
plotprogram (spice.eldo.eldo.eldo property)
(spice.ngspice.ngspice.ngspice property)
(spice.spectre.spectre.spectre property)
(spice.spice property)
pos (spice.spice_dcsource.spice_dcsource attribute)
postlayout (spice.spice property)
postlayout_subckts (spice.spice property)
preserve_adsfiles (ads.ads property)
preserve_iofiles (thesdk.thesdk property)
preserve_rtlfiles (rtl.rtl property)
preserve_spicefiles (spice.spice property)
print_colors (thesdk.thesdk property)
print_log() (thesdk.thesdk method)
print_relative_path (thesdk.thesdk property)
proplist (inverter.inverter attribute)
,
[1]
,
[2]
,
[3]
Q
questasim (class in rtl.questasim.questasim)
questasim_controlfilepaths (rtl.questasim.questasim.questasim property)
questasim_dofilepaths (rtl.questasim.questasim.questasim property)
questasim_rtlcmd (rtl.questasim.questasim.questasim property)
questasim_simdut (rtl.questasim.questasim.questasim property)
questasim_simtb (rtl.questasim.questasim.questasim property)
queue (thesdk.thesdk property)
R
ramp (spice.spice_dcsource.spice_dcsource attribute)
read() (spice.spice_iofile.spice_iofile method)
(thesdk.iofile.iofile method)
read_oppts() (spice.eldo.eldo.eldo method)
(spice.ngspice.ngspice.ngspice method)
(spice.spectre.spectre.spectre method)
(spice.spice method)
read_outfile() (rtl.rtl method)
read_spice_outputs() (spice.spice method)
remove() (spice.spice_iofile.spice_iofile method)
(thesdk.iofile.iofile method)
resultfile_ext (spice.eldo.eldo.eldo property)
(spice.ngspice.ngspice.ngspice property)
(spice.spectre.spectre.spectre property)
Rs (inverter.inverter attribute)
,
[1]
,
[2]
,
[3]
rs (spice.spice_iofile.spice_iofile attribute)
rtl
module
rtl (class in rtl)
rtl.icarus.icarus
module
rtl.module
module
rtl.module_common
module
rtl.questasim.questasim
module
rtl.rtl_iofile
module
rtl.sv.sv
module
rtl.sv.verilog_connector
module
rtl.sv.verilog_module
module
rtl.sv.verilog_testbench
module
rtl.testbench
module
rtl.testbench_common
module
rtl.vhdl.vhdl
module
rtl.vhdl.vhdl_entity
module
rtl_connectors (rtl.rtl_iofile.rtl_iofile property)
rtl_ctstamp (rtl.rtl_iofile.rtl_iofile property)
rtl_fclose (rtl.rtl_iofile.rtl_iofile property)
rtl_fopen (rtl.rtl_iofile.rtl_iofile property)
rtl_fptr (rtl.rtl_iofile.rtl_iofile property)
rtl_io (rtl.rtl_iofile.rtl_iofile property)
rtl_io_condition (rtl.rtl_iofile.rtl_iofile property)
rtl_io_condition_append() (rtl.rtl_iofile.rtl_iofile method)
rtl_io_sync (rtl.rtl_iofile.rtl_iofile property)
rtl_iofile (class in rtl.rtl_iofile)
rtl_pstamp (rtl.rtl_iofile.rtl_iofile property)
rtl_stat (rtl.rtl_iofile.rtl_iofile property)
rtl_statdef (rtl.rtl_iofile.rtl_iofile property)
rtl_tdiff (rtl.rtl_iofile.rtl_iofile property)
rtl_timeprecision (rtl.rtl property)
(rtl.testbench_common.testbench_common property)
rtl_timescale (rtl.rtl property)
(rtl.rtl_iofile.rtl_iofile property)
(rtl.testbench_common.testbench_common property)
rtl_timeunit (rtl.rtl property)
rtlcmd (rtl.rtl property)
rtlmisc (rtl.rtl property)
rtlparam (rtl.rtl_iofile.rtl_iofile property)
rtlparameters (rtl.rtl property)
rtlsimpath (rtl.rtl property)
rtlworkpath (rtl.rtl property)
run() (ads_template.ads_template method)
(inverter.inverter method)
,
[1]
(inverter_testbench.inverter_testbench method)
run_ads() (ads.ads method)
run_parallel() (thesdk.thesdk method)
run_plotprogram() (spice.eldo.eldo.eldo method)
(spice.ngspice.ngspice.ngspice method)
(spice.spectre.spectre.spectre method)
(spice.spice method)
run_rtl() (rtl.rtl method)
run_spice() (spice.spice method)
runname (ads.ads property)
(thesdk.thesdk property)
S
sample_signal() (spice.spice_iofile.spice_iofile method)
save_database (spice.spice property)
save_output_file (spice.spice property)
save_state (thesdk.thesdk property)
seed (spice.spice_simcmd.spice_simcmd attribute)
serial() (inverter_testbench.inverter_testbench method)
set_control_data() (rtl.rtl_iofile.rtl_iofile method)
set_simulation_options() (ads.ads method)
si_prefix_mult (spice.spice property)
silence() (thesdk.thesdk method)
sim (spice.spice_simcmd.spice_simcmd attribute)
simcmd_bundle (spice.spice property)
simcmds (spice.testbench_common.testbench_common property)
simcmdstr (spice.eldo.eldo_testbench.eldo_testbench property)
(spice.ngspice.ngspice_testbench.ngspice_testbench property)
(spice.spectre.spectre_testbench.spectre_testbench property)
(spice.testbench.testbench property)
simdut (rtl.rtl property)
simpath (thesdk.thesdk property)
simpathroot (thesdk.thesdk property)
simtb (rtl.rtl property)
simulator_control_contents (rtl.rtl property)
simulator_controlfile (rtl.rtl property)
simulatorcmd (spice.eldo.eldo.eldo property)
(spice.ngspice.ngspice.ngspice property)
(spice.spectre.spectre.spectre property)
skipstart (spice.spice_simcmd.spice_simcmd attribute)
sourcelib (ads.ads property)
sourcelibpath (ads.ads property)
sourcetype (spice.spice_dcsource.spice_dcsource attribute)
(spice.spice_iofile.spice_iofile attribute)
sparam_filename (ads.ads property)
spectre (class in spice.spectre.spectre)
spectre_testbench (class in spice.spectre.spectre_testbench)
spice
module
spice (class in spice)
spice.eldo.eldo
module
spice.eldo.eldo_testbench
module
spice.ngspice.ngspice
module
spice.ngspice.ngspice_testbench
module
spice.spectre.spectre
module
spice.spectre.spectre_testbench
module
spice.spice_common
module
spice.spice_dcsource
module
spice.spice_iofile
module
spice.spice_module
module
spice.spice_simcmd
module
spice.testbench
module
spice.testbench_common
module
spice_common (class in spice.spice_common)
spice_dcsource (class in spice.spice_dcsource)
spice_iofile (class in spice.spice_iofile)
spice_module (class in spice.spice_module)
spice_simcmd (class in spice.spice_simcmd)
spice_simulator (spice.spice property)
spice_submission (spice.spice property)
spice_tb (spice.spice property)
spicecmd (spice.eldo.eldo.eldo property)
(spice.ngspice.ngspice.ngspice property)
(spice.spectre.spectre.spectre property)
(spice.spice property)
spicecorner (spice.spice property)
spicedbpath (spice.spice property)
spicemisc (spice.spice property)
spiceoptions (spice.spice property)
spiceparameters (spice.spice property)
spicesimpath (spice.spice property)
spicesrc (spice.spice property)
spicesrcpath (spice.spice property)
spicesubcktsrc (spice.spice property)
spicetbsrc (spice.spice property)
statedir (thesdk.thesdk property)
statepath (thesdk.thesdk property)
step (spice.spice_simcmd.spice_simcmd attribute)
strobe (spice.spice_iofile.spice_iofile attribute)
strobe_indices (spice.spice_common.spice_common property)
strobedelay (spice.spice_simcmd.spice_simcmd attribute)
strobeperiod (spice.spice_simcmd.spice_simcmd attribute)
subckt (spice.eldo.eldo.eldo property)
(spice.ngspice.ngspice.ngspice property)
(spice.spectre.spectre.spectre property)
(spice.spice_module.spice_module property)
subcktname (spice.spice_simcmd.spice_simcmd attribute)
sv (class in rtl.sv.sv)
sv_create_connectors() (rtl.sv.sv.sv method)
sweep (spice.spice_simcmd.spice_simcmd attribute)
swpstart (spice.spice_simcmd.spice_simcmd attribute)
swpstep (spice.spice_simcmd.spice_simcmd attribute)
swpstop (spice.spice_simcmd.spice_simcmd attribute)
syntaxdict (spice.eldo.eldo.eldo property)
(spice.ngspice.ngspice.ngspice property)
(spice.spectre.spectre.spectre property)
(spice.spice property)
T
testbench (class in rtl.testbench)
(class in spice.testbench)
testbench_common (class in rtl.testbench_common)
(class in spice.testbench_common)
testbench_simulator (spice.testbench.testbench property)
tfall (spice.spice_iofile.spice_iofile attribute)
thesdk
module
thesdk (class in thesdk)
thesdk.iofile
module
timer() (thesdk.thesdk method)
TL_mesh_cells (ads.ads property)
tprint (spice.spice_simcmd.spice_simcmd attribute)
trigger (spice.spice_iofile.spice_iofile attribute)
trise (spice.spice_iofile.spice_iofile attribute)
tstop (spice.spice_simcmd.spice_simcmd attribute)
type (rtl.sv.verilog_connector.verilog_connector property)
U
uic (spice.spice_simcmd.spice_simcmd attribute)
V
value (spice.spice_dcsource.spice_dcsource attribute)
var_data (ads.citi_to_touchstone.citi_to_touchstone property)
var_format (ads.citi_to_touchstone.citi_to_touchstone property)
var_name (ads.citi_to_touchstone.citi_to_touchstone property)
var_nbr_of_points (ads.citi_to_touchstone.citi_to_touchstone property)
vdd (inverter.inverter attribute)
,
[1]
,
[2]
,
[3]
verilog_connector (class in rtl.sv.verilog_connector)
verilog_instance (rtl.module_common.module_common property)
(rtl.sv.verilog_module.verilog_module property)
verilog_instance_add() (rtl.testbench.testbench method)
(rtl.testbench_common.testbench_common method)
verilog_instances (rtl.testbench.testbench property)
(rtl.testbench_common.testbench_common property)
verilog_module (class in rtl.sv.verilog_module)
verilog_testbench (class in rtl.sv.verilog_testbench)
vhdl (class in rtl.vhdl.vhdl)
vhdl_entity (class in rtl.vhdl.vhdl_entity)
vhdl_instance (rtl.module_common.module_common property)
vhdlcompargs (rtl.vhdl.vhdl.vhdl property)
vhdlentityfiles (rtl.rtl property)
(rtl.vhdl.vhdl.vhdl property)
vhdlext (rtl.vhdl.vhdl.vhdl property)
vhdllibfileentities (rtl.rtl property)
vhdlsimargs (rtl.vhdl.vhdl.vhdl property)
vhdlsimtb (rtl.vhdl.vhdl.vhdl property)
vhdlsrc (rtl.vhdl.vhdl.vhdl property)
vhdlsrcpath (rtl.vhdl.vhdl.vhdl property)
vhi (spice.spice_iofile.spice_iofile attribute)
vlo (spice.spice_iofile.spice_iofile attribute)
vlogcompargs (rtl.sv.sv.sv property)
vlogext (rtl.sv.sv.sv property)
vloglibfilemodules (rtl.rtl property)
vlogmodulefiles (rtl.rtl property)
(rtl.sv.sv.sv property)
vlogsimargs (rtl.sv.sv.sv property)
vlogsimtb (rtl.sv.sv.sv property)
vlogsrc (rtl.sv.sv.sv property)
vlogsrcpath (rtl.sv.sv.sv property)
vth (spice.spice_iofile.spice_iofile attribute)
W
write() (spice.spice_iofile.spice_iofile method)
(thesdk.iofile.iofile method)
write_infile() (rtl.rtl method)
write_spice_inputs() (spice.spice method)
write_touchstone() (ads.citi_to_touchstone.citi_to_touchstone method)